## Parameters for selection of a processor — part 1 : Some Notes

Ref: (1) Digital Control of Dynamic Systems by Franklin, Powell and Workman(2) the internet wrb (3) Manuals of various DSP vendors like TI and Analog Devices.

Before examining some of the requirements placed on Digital Signal or Control Processors (DSP’s or DCP’s), let’s define some of the basic parametric considerations in choosing a processor:

1. Speed: The rate at which a computer can execute instructions. Note that speed is important relative only to word length and instruction complexity. Although a bit of an oversimplification, the amount of work done per unit time can be loosely expressed as “power $\approx$ Speed x Word length x Instruction power; where word length and instruction power are defined below. Basically, the aggregate measure of processor power must not only include the speed at which it can execute instructions but it must also to the complexity of the instructions and the sice of the word on which they operate. Quoting processor speed (often measured by MIPS) without word length and instruction complexity is like specifying a trenching machine by the length of the trench it can dig per unit time, without specifying how wide or how deep the resulting trench would be. Comparing versions of the same basic processor by comparing MIPS is valid, but most literature discusses microprocessors of the same type by referring to their clock rate.
2. Arithmetic Logic Unit: (ALU):Usually referred to with the acronym ALU, the arithmetic logic unit is the hardware that performs the basic arithmetic operations in the processor, including add, subtract, and boolean logic operations.
3. Multiplier Accumulator (MAC):Hardware dedicated to multiplying two numbers and adding into an accumulator register. In control and signal processors, the speed of the MAC is of paramount importance.
4. Instruction Set: The basic operations that can be performed by the processor. These range from bit-flipping operations accomplished in the ALU to fixed- and floating-point arithmetic accomplished in the multiplier-accumulator. More complex instructions, such as multiply, can be measured in terms of the number of logical operations they require (such as shift and adds in the case of multiply without an MAC). Because many processors execute different instructions at different rates, processor power is best measured in terms of benchmark tasks. The key difference among benchmarks is the instruction mix they represent. Benchmarks can be misleading and must be examined carefully before they are used to make comparisons between machines.It is possible to construct a benchmark that favors one machine over another even though for the application being considered it may be inferior. Some common benchmarks include the Whetstone and the Dhrystone. (Refer to the web or the books Computer Organization and Computer Architecture by Hennessy and Patterson for more details of these benchmarks). The Whetstone benchmark is a measure of Fortran and floating point performance and records the time it takes to perform predefined floating point operations. The Dhrystone benchmark is a measure of integer processes per second. Integer processes include operations such as assignment, arithmetic and control. This benchmark uses integer, character, string, pointer and record operand types. Complex fast FFT’s are also a common benchmark. Again, care must be taken in comparing benchmarks because small details can be omitted which could change the outcome of the comparison.
5. Word length:The width of the data stream measured in bits, usually an integral number of bytes. Although the power of a processor as defined above increases with word length,it should be clear that in most applications there is a point beyond which increasing word length has no benefit (just like the law of diminishing returns in economics/finance). For fixed point arithmetic, data rarely need more than 24 to 32 bits of precision (though, in my opinion, this could change with IOT processors).
6. Memory Size:The amount of memory space or address space the processor supports.
General purpose applications typically require far more memory than signal processing or control applications, and signal processing far more than control applications.
7. Addressing:The sophistication or number of addressing modes available. They include direct, indirect, immediate, relative, and more. High level language compilers can be made more efficient with more sophisticated addressing modes, but DSP’s and DCP’s make little use of anything but the very basic addressing modes. Circular addressing is an auto-increment address register that has a selectable modulo base producing an address that circulates through a memory block of relatively small length, such as 32 words. FIR filters are efficiently implemented using circular addressing (not too common in control applications), because a finite block of data that contains the recent N samples of input can be addressed very easily.
8. Digital I/O:Addressable logic ports for output or input of logical signals to peripheral devices, such as a switch or an LED indicator.
Whereas general purpose processors usually employ an I/O space using a bus architecture, DSP’s and DSP’s usually employ employ a small number of digital I/O lines in addition to an I/O space (addresses reserved for input-output registers using the data bits).
9. Error Detection and Correction: Some applications require no error detection or correction, others require both. Mobile devices invariably employ error correction. In control systems, parity is a common and simple error detection technique. If the number of logically high (or 1) bits in a byte is odd, the parity is said to be odd; else it is even. When a bit, byte or word of information is transmitted to a receiver along with the parity bit(s), it allows the receiver to check the parity of the received information against the parity generated by the sender. As long as only one bit was in error, parity generation and checking allows detection of the error. Parity can be incorporated in a bit-for-bit basis (100% overhead), a bit-for-byte basis, or a bit-for-word basis. A simple parity bit-per-byte of information transmitted is most common, and in such a case it is easy to picture that for each group of nine bits (eight data bits plus one parity), the action of the parity bit is to keep the parity of the nine bits constant (odd or even). It seems that there are some industrial processors (especially IOT processors) which contain internal error detection and correction, such as in the internal buses, ALU’s (arithmetic logic units), or multipliers. For real-time or critical applications, the error detection and correction feature is integrated in hardware.
10. Interrupts:Processor interrupts provide a means of rapidly switching the program that is being executed from one task to another in response to an external (hardware) stimulus. Hardware interrupts are usually inputs that cause the processor to be vectored to a new location in memory. Some interrupts can be masked (ignored) by setting control registers inside the processor, and some purposely cannot be disabled. In control applications, the calculation of the next control often begins when an A/D converter signals that it has completed a conversion. Using the conversion complete signal as an interrupt input is a common practice. It should be noted, however, that some processors have variable response time to interrupts, often depending on the instruction being executed at the time of the interrupt request. Especially true in general purpose processors, the variance in response time can be large, and it is damaging to the controller in that it represents control delay jitter. One advantage of most DSP processors is that the interrupt response time is constant.
11. ROM, RAM, PROM, EPROM, EEPROM:These are, of course, types of memory. Although non-volatile ROM is useful for storing fixed program code, RAM can store both variable and program data. RAM is volatile and must be loaded from somewhere upon power-up unless it contains only calculated and measured data. Although a PROM could be read and stored in RAM, PROM’s are typically very fast,, and there is little reason to stage them in staged memory structures. EPROMs are erasable PROMs; the erase cycle takes special hardware and is slow compared to the read access time. EPROMs are extremely useful to the development of digital control systems where the controller code is updated only infrequently. EEPROMs appeared after all the other memories listed above. EEPROMs are electrically erasable PROMs that have an in-circuit erase mode, which is v slow but requires no special hardware to accomplish. In a system requiring a small amount of non volatile storage and that needs to be updated infrequently from some external source, EEPROMs are inexpensive solid state candidates. Care must be taken in the design to prevent accidental overwrite of the program and/or data stored in EEPROMs, even under temporary fault conditions. Transient noise (glitches), addressing errors, and the like should be considered in designing hardware to protect the device from being put in the write mode inadvertently. In a nutshell, the three parameters are price, performance and power. For IoT processors, security too needs consideration.

We will examine the details soon.

Nalin Pithwa

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